Toggle the conversion gate: chiplet design wins only change Intel foundry P&L when they become external wafer starts.

CoWoS capacity constraint pushes chiplet customers to a second source; Intel's packaging-first wedge flips the thesis only on wafer-start conversion AI accelerator chiplet demand allocated 2nm booked hikes 2027 advanced packaging + not density, binds the chain Socionext / fabless second source added EMIB Foveros ASAT Intel foundry packaging-first wedge AWS · MSFT · Socionext leading-edge process conversion gate wins convert? Thesis strengthens wins become wafer starts Thesis unchanged P&L does not move